CGM.h File Reference

Clock Generation Module. More...

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Data Structures
union	CGMCLKOutConfig_t
Defines
#define	TRUE   (1u)
#define	CLEAR   (0u)
#define	BITS_IN_NIBBLE   (4u)
#define	BITS_IN_BYTE   (8u)
#define	BYTES_IN_16   (2u)
#define	BYTES_IN_32   (4u)
#define	BIT_DEFINITION
#define	BIT0   (1u << 0u)
#define	BIT1   (1u << 1u)
#define	BIT2   (1u << 2u)
#define	BIT3   (1u << 3u)
#define	BIT4   (1u << 4u)
#define	BIT5   (1u << 5u)
#define	BIT6   (1u << 6u)
#define	BIT7   (1u << 7u)
#define	BIT8   (1u << 8u)
#define	BIT9   (1u << 9u)
#define	BIT10   (1u << 10)
#define	BIT11   (1u << 11)
#define	BIT12   (1u << 12)
#define	BIT13   (1u << 13)
#define	BIT14   (1u << 14)
#define	BIT15   (1u << 15)
#define	BIT16   (1u << 16)
#define	BIT17   (1u << 17)
#define	BIT18   (1u << 18)
#define	BIT19   (1u << 19)
#define	BIT20   (1u << 20)
#define	BIT21   (1u << 21)
#define	BIT22   (1u << 22)
#define	BIT23   (1u << 23)
#define	BIT24   (1u << 24)
#define	BIT25   (1u << 25)
#define	BIT26   (1u << 26)
#define	BIT27   (1u << 27)
#define	BIT28   (1u << 28)
#define	BIT29   (1u << 29)
#define	BIT30   (1u << 30)
#define	BIT31   (1u << 31)
#define	N_OF_PLL_INSTANCES   2u
#define	IDF_SETTING_FOR_16MHZ   ((uint8_t)4u)
#define	LDF_SETTING_FOR_16MHZ   ((uint8_t)32u)
#define	ODF_SETTING_FOR_16MHZ   ((uint8_t)3u)
#define	IDF_SETTING_FOR_64MHZ   ((uint8_t)4u)
#define	LDF_SETTING_FOR_64MHZ   ((uint8_t)64u)
#define	ODF_SETTING_FOR_64MHZ   ((uint8_t)2u)
#define	CLK_OUT_ENABLE   ((uint8_t)0x80u)
#define	CLK_OUT_DISABLE   ((uint8_t)0x00u)
#define	CLK_OUT_DIV_BY_1   ((uint8_t)0x00u)
#define	CLK_OUT_DIV_BY_2   ((uint8_t)0x10u)
#define	CLK_OUT_DIV_BY_4   ((uint8_t)0x20u)
#define	CLK_OUT_DIV_BY_8   ((uint8_t)0x30u)
#define	CLK_OUT_SOURCE_IRC   ((uint8_t)0x00u)
#define	CLK_OUT_SOURCE_PLL0   ((uint8_t)0x02u)
#define	CLK_OUT_SOURCE_PLL1   ((uint8_t)0x03u)
#define	CLK_OUT_SOURCE_XOSC   ((uint8_t)0x01u)
#define	INVALID_PLL_INSTANCE   BIT0
#define	INVALID_PLL_DIVIDER   BIT1
#define	PLL_DID_NOT_LOCK   BIT2
#define	N_ELEMENTS(X)   (sizeof(X)/sizeof(*(X)))
Enumerations
enum	PLL_INSTANCES { PLL_INSTANCE_0 = 0u, PLL_INSTANCE_1 }
Functions
void	vfnClockOutputEnable (CGMCLKOutConfig_t tMyCGMConfig)
	Given that P[22] is enabled, this function enables or disables output of a clock signal to the CLKOUT pin.
uint8_t	u8fnClockPLLConfig (uint8_t u8PLLInstance, uint8_t u8IDF, uint8_t u8ODF, uint8_t u8LDF)
	This function allows to configure a PLL setting in order to change the frequency of the system bus (or any other). It responds to the formula (Fosc * LDF) / (IDF * ODF).
void	vfnClockClearPLLFlag (uint8_t u8PLLInstance)
	This function clears any existing PLL faults for a given instance.

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Detailed Description

Clock Generation Module.

Copyright (c) 2011 Freescale Semiconductor Freescale Confidential Proprietary

Author:

Freescale Semiconductor

SASD Automotive

R11515

Version:

Date:

Warning:

(If needed)

History:

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Define Documentation

#define INVALID_PLL_DIVIDER   BIT1

Invalid PLL settings error mask

#define INVALID_PLL_INSTANCE   BIT0

Invalid PLL instance selected error mask

#define PLL_DID_NOT_LOCK   BIT2

PLL failed to lock error mask

---

Function Documentation

uint8_t u8fnClockPLLConfig	(	uint8_t	u8PLLInstance,
		uint8_t	u8IDF,
		uint8_t	u8ODF,
		uint8_t	u8LDF
	)

This function allows to configure a PLL setting in order to change the frequency of the system bus (or any other). It responds to the formula (Fosc * LDF) / (IDF * ODF).

Parameters:

u8PLLInstance,:

Either 0 or 1, depending on which PLL we're config u8IDF: IDF value in the formula. Can't be bigger than 4 bits. u8ODF: IDF value in the formula. Can't be bigger than 2 bits. u8LDF: IDF value in the formula. Can't be bigger than 7 bits.

Returns:

Clear if everything is in order; INVALID_PLL_INSTANCE if the passed instance is invalid; INVALID_PLL_DIVIDER if any of the passed arguments is outside of the valid values.

void vfnClockClearPLLFlag

(

uint8_t

u8PLLInstance

)

This function clears any existing PLL faults for a given instance.

Parameters:

u8PLLInstance,:

Either 0 or 1, depending on which PLL we're config

Returns:

void.

void vfnClockOutputEnable

(

CGMCLKOutConfig_t

tMyCGMConfig

)

Given that P[22] is enabled, this function enables or disables output of a clock signal to the CLKOUT pin.

Parameters:

tMyCGMConfig,:

Contains enable/disable information, as well as the divisor value (1, 2, 4, 8) and the source (IRC, XTAL, PLL0 or PLL1) as defined by CGMCLKOutConfig_t.

Returns:

void.